Recently we were asked a good & interesting question:
- How do I use “soft constraint” in the macro `uvm_do_with? What would be the syntax?
I say this is a good & interesting b’cos of 2 things:
1. The SV LRM doesn’t give an explicit example for this (it is fine, not that it should, LRM is not a textbook)
2. The use case should be considered (This specific user had a good need – for automatic coverage closure – or ACC).
Now with 3 major EDA vendors supporting this syntax, you should leverage on this more!