CVC strongly believes in "ecosystem" and mutual growth than self-centric. Over the years we have established various partnerships with several key stakeholders of the VLSI ecosystem. While we continuously add to this list of partners, below are our current partners and brief description of the partnership.
Being a valued Questa Vanguard Partner enables CVC to access some of the most advanced technologies being developed at Mentor Grahpics. Mentor has been exceptionally great at supporting its partners in terms of licenses, hosting seminars etc. It is a pleasure to be part of QVP and contribute to the ecosystem!
Synopsys, being the lead SystemVerilog promoter for long time (since its incarnation) has been supporting an ecosystem through its vibrant SystemVerilog Catalyst program. CVC has been a very active member since its early days right from our work on SystemVerilog Assertions handbook, 1st edition back in 2005! We cherish our continued technical involvement in the growth of SystemVerilog through our partnership with Synopsys as it gives us access to early language implementations in VCS.
Aldec develops and delivers high quality, performance-driven EDA products for government, military, aerospace, telecommunications, automotive and control applications.
With UNITE partnership program Aldec actively engages with key partners worldwide to cater to a large customer base with complimentary skills being offred by the partner. CVC is a Training & IP vendor partner with Aldec promoting its products and solutions in local and global markets via trainings, seminars, webinars etc.
Axiom’s flagship product, MPSim is the state-of-the-art, industry proven high performance Verilog and SystemVerilog simulator integrated with the most advanced debugger, compiled testbench automation, multiple clock domain verification and comprehensive coverage analysis for quick verification closure. Its support for UPF makes it a fully loaded verification platform
CVC has integrated MPSim into its training labs and advanced research work and starting to explore emerging features like the DesignerUVM - which is unique in the industry as of now.
Agnisys offers affordable VLSI design and verification tools for SoC, FPGAs and IPs that makes design verification process extremely efficient.
We at CVC have been using IDS from Agnisys to create VMM/UVM RAL/Register descriptions that automate ~20% of our TB code. We also demonstrate this during our advanced training sessions.
The SpringSoft Harmony Partner Program promotes interoperability between our partners' products and Novas Verification Enhancement and Laker Custom IC Design solutions. Our partners in the Harmony Program are provided with access to SpringSoft software licenses, integration expertise and joint marketing campaigns.
CVC has been enjoying a fruitful partnership with SpringSoft with joint promotions via its trainings, blogs (www.cvcblr.com/blog ) and other avenues in highlighting modern day debug challenges and how SpringSoft's technologies help tackle them effectively.
CVC has been a key enabler of VMM deployment, dissemination right from its early days. Our technical executives have co-authored a famous book on "A Pragmatics approach to VMM Adoption" and our VMM trainings have been praised by many of our customers including Quartics, NVidia etc. We at CVC blog along with key users of VMM at www.vmmcentral.org and www.cvcblr.com/blog to disseminate the learnings of this every growing methodology.
OVM is the first truly inter-operable verification methodology incorporating years of proven concepts from eRM and AVM.
CVC has been a OVM partner and has delivered several trainings on OVM and deployed/demonstrated benefits of OVM to its customers in AsiaPac region.
Training-Classes.com is a one-stop shop for all modern day training requirements online. CVC has been listed as a Training partner and has been receiving several important leads from this unique, free-to-use service. We greatly appreciate the value it provides to the community as a whole!
Teal/Truss is a multi-vendor, multi-language, open source verification framework available in both C++ and SystemVerilog. CVC has been supporting Teal/Truss in local market and are also exploring some development work for VHDL interface to Truss!